1. Technical Field
This invention in general relates to semiconductor circuits. More specifically, this invention relates to circuits for driving STN liquid crystal displays.
2. Description of the Related Art
FIG. 1 shows a structure of conventional supertwisted nematic (“STN”) liquid crystal display (“LCD”) module, which comprises an LCD panel 101 consisting of row electrodes 102 and column electrodes 103, a row driver 104 for applying row driving voltages to the row electrodes 102, and a column driver 105 for applying column driving voltages to the column electrodes 103. Pixels are formed at every crosssection of the row and column electrodes, such as at 106. Each pixel changes to black, white, or a different shade of gray or color depending on the voltages applied by the corresponding row and column electrodes across the liquid crystal to change the light transmittance.
In order to display a frame of data, voltages must be applied to all the individual electrodes so that all the pixels are addressed. In conventional sequential driving methods, each row electrode is selected sequentially (also called “scanning electrode”) and the pixel data values corresponding to the selected scanning electrode are applied to the corresponding column electrode. Each frame needs to be displayed repeatedly to maintain a certain RMS value of each pixel so that the frames can be recognized by human eyes without any flickering.
In the cases where the display data needs to be changed very fast such as in displaying moving pictures, the conventional sequential driving methods suffers so-called a “frame response phenomenon.” In order to drive a high-speed or large-panel liquid crystal, driving pulses of high-amplitude and short pulse width are required, which causes uneven brightness of the LCD panel.
Multi-line addressing (MLA) methods have been suggested for driving flat panel devices as alternatives to sequential driving methods. According to the MLA methods, multiple row electrodes are selected simultaneously to enable multiple selection of row electrodes within a frame cycle to increase the effective duty cycle of the row voltage application. Typically, orthogonal signals are applied to a set of row electrodes so that the individual electrodes can maintain the same effective RMS values within a frame.
When orthogonal row signals are simultaneously applied to a set of row electrodes, new column signals must be determined to maintain the correct pixel data. In other words the voltage levels to column electrodes should be recalculated, taking into account of simultaneous driving of multiple row electrodes.
FIG. 2 shows a block diagram of a conventional 4-line MLA column driver. A display data RAM 121 stores data for display and outputs some of the display data for latch by a display data latch 122. In order to facilitate recalculation of the column signals, orthogonal row signals Fi(t) applied to a set of row electrodes are compared with the display data of the same set of row electrodes at an XOR block 123 column by column to find mismatches between the orthogonal signals Fi(t) and display data for each column. A decoder block 124 calculates mismatch numbers based on the result of mismatches from the XOR block 123. After the mismatch numbers are latched at an output latch block 125, the data levels of the mismatch numbers are shifted at a level shifter block 126, and a voltage selector 127 selects a voltage level among 5 different voltages levels based on the level-shifted mismatch numbers.
Because the conventional MLA driver uses data and output latches, it requires a large chip area in its implementation, which adversely affect the performance of the driver. Therefore, there is a need for a new driver that requires less number of circuit components and chip area to improve the performance.